Isolation couplers for electrically isolating circuits, one from another are known. In general, such isolation couplers can be classified into four separate categories, namely, transformer-based isolators, capacitively coupled isolators, magneto-sensitive (e.g., Hall effect, MR, GMR and similar) isolators and opto-coupler-based isolators. Many such couplers are not suitable for use in integrated circuit applications because they require external circuit components, suffer from disadvantages relating to size and cost, and require complicated hybrid assembly or packaging arrangements. One attempt to provide an integrated magneto-sensitive isolation coupler which would to some extent be compatible with integrated circuit technology is disclosed in U.S. Pat. No. 4,801,883 of Muller, et al. The coupler of Muller, et al comprises a magnetic field source and a magnetic field detector, which are electrically isolated from each other by a dielectric medium located between the magnetic field source and the magnetic field detector. The magnetic field source is provided by a flat or planar inductor coil which receives an input signal and in turn generates a magnetic field in response to the input signal. The detector is located beneath the flat inductor coil and is provided by two carrier-domain-magnetometers which sense the magnetic field and output a signal corresponding to the input signal to the inductor coil in response to the magnetic field generated by the inductor coil. The inductor coil and the two carrier-domain-magnetometers are formed on the same integrated chip, and the carrier-domain-magnetometers are electrically isolated from the inductor coil by the dielectric medium, which is provided by a dielectric layer. However, a disadvantage of the isolation coupler of Muller, et al is that carrier-domain-magnetometers (like the field-receiving elements of many other magneto-sensitive isolators) are unsuitable for use in modern standard MOS processes. In order to implement the isolation coupler of Muller, et al in such MOS processes, substantial and costly changes and additional processing steps are required to the MOS processes. This is undesirable, since any changes or additions to standard MOS processes, and in particular to standard CMOS processes are relatively costly, and in general, introduce inefficiencies into the processes.
There is therefore a need for an integrated one-way isolation coupler which is suitable for implementation in a standard MOS process.
The present invention is directed towards providing such an integrated one-way isolation coupler. The invention is also directed towards providing a semiconductor chip comprising such a one-way isolation coupler.